MyIntoPIX : Login - Subscribe - Lost password

Home > Products > Memory Controllers - Memory Arbiter
 
Array ( [7] => stdClass Object ( [menu_label] => TICO [firstProductId] => 31 [products] => Array ( ) ) [1] => stdClass Object ( [menu_label] => JPEG 2000 FPGA/ASIC [firstProductId] => 15 [products] => Array ( [0] => stdClass Object ( [id] => 1 [menu_label] => HD Encoder/Decoder ) [1] => stdClass Object ( [id] => 2 [menu_label] => Cinema Encoder/Decoder ) [2] => stdClass Object ( [id] => 3 [menu_label] => Lossless Encoder/Decoder ) [3] => stdClass Object ( [id] => 26 [menu_label] => UHD 4K/8K Encoder/Decoder ) [4] => stdClass Object ( [id] => 34 [menu_label] => J2K-RAW Encoder/Decoder ) ) ) [3] => stdClass Object ( [menu_label] => Crypto / Security [firstProductId] => 9 [products] => Array ( [0] => stdClass Object ( [id] => 10 [menu_label] => AES Encryption ) [1] => stdClass Object ( [id] => 11 [menu_label] => RSA Public Key ) [2] => stdClass Object ( [id] => 12 [menu_label] => HMAC-SHA1 ) ) ) [2] => stdClass Object ( [menu_label] => Memory Controllers [firstProductId] => 5 [products] => Array ( [0] => stdClass Object ( [id] => 6 [menu_label] => Memory Controllers ) [1] => stdClass Object ( [id] => 7 [menu_label] => Memory Arbiter ) ) ) [10] => stdClass Object ( [menu_label] => Video Transport [firstProductId] => 38 [products] => Array ( [0] => stdClass Object ( [id] => 39 [menu_label] => MPEG-2 TS ) [1] => stdClass Object ( [id] => 41 [menu_label] => SMPTE 2022 Reference Design ) [2] => stdClass Object ( [id] => 8 [menu_label] => UDP Protocol Manager ) ) ) )

Download

JPEG 2000 

JPEG 2000 ALTERA     

JPEG 2000 XILINX     


TICO 

TICO ALTERA                 

TICO XILINX                  

TICO CPU SDK

TRANSPORT 

VIDEO TRANSPORT ALTERA (SMPTE2022,...)              

VIDEO TRANSPORT XILINX (SMPTE2022,...)              


Business Development Manager USA
Download Center


 

IPX-MA: Memory Arbiter

General Description

This IP-core is a 4-port arbiter - each port with the same width (32, 64, 128 or 256) - running up to 133 MHz. The block enables the external memory to be shared between different processes e.g. Frame buffers, Watermarking, PCI-Express buffers,...
The arbiter schedules the order in which requests access memory.

Resources

Resources for Altera and Xilinx FPGA devices are provided on request.

Key Features

  • High memory efficiency
  • Predictable
  • Fast
  • Fair
  • Flexible

 


   Back to TOP of page  Contact